John Palmour

【Industry news】 As #TSMC's #3-nanometer #supply exceeds #demand, all four major customers' #production #capacity is fully covered. #TSMC's 3-nanometer #orders are expected to be full until 2026. According to reports, #NVIDIA, #Apple, #AMD and #Qualcomm are now considering #raising #AI #hardware #prices. #TSMC's #production #capacity plan for this year has tripled compared with last year, but it is still not enough. #Industry #demand is currently at its peak. In addition, TSMC's N3P process is also widely used in the #mobile field. Overall, the 3nm lineup is quite complete. It is not yet certain whether TSMC will increase prices as a result, but it emphasized that "pricing strategies are always strategy-oriented, not opportunity-oriented, and will continue to work closely with customers to provide value." However, foreign media believe that as the #supply of 3 nanometers exceeds demand, TSMC is likely to increase prices, which will affect IC design companies. TSMC is currently planning to convert some 5-nanometer #equipment to #support 3-nanometer #production #capacity, and the industry expects monthly production capacity to increase to 120,000 to 180,000 pieces. However, the industry has not yet considered the production capacity needs of Intel's Lunar Lake #processors. Although it cannot yet be determined whether the price of consumer products will increase due to #3nm #supply disruptions, these indicators indicate that this will happen.

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Happy #CostModelMonday! I did a #fan-out panel-level versus wafer-level comparison at #IMAPS DPC this year, and I'm expanding on it for the IMAPS Symposium. I had a single #yield chart in my analysis previously, looking at yield crossover points in relation to how expensive the incoming chip was. I did a new analysis that looks at when the crossover point occurs for two different panel sizes. In this chart, the same package is built with fan-out packaging on a 300mm wafer and from two different panel sizes. The yield for the 300mm wafer example is held steady at 99%, while the yield is changed for the panel-level processes. For the package built with the 515x510mm panel, the crossover point occurs just past 95%. However, the crossover point is closer to 94% for the package from the 600x600mm panel. In other words, a little more yield loss can be sustained by the package from the larger panel before it no longer competes with a higher yielding package from the wafer.

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MCC (Micro Commercial Components) introduced new high-performance 40V N-channel #MOSFETs. These components leverage split-gate trench (SGT) technology and full AEC-Q101 qualification in compact packages. These versatile MOSFETs in high-demand DPAK and D2PAK packages ensure a seamless upgrade path with minimal changes for integration within existing designs. Adding to their unquestionable performance in harsh conditions, these components have a high operating junction temperature of up to 175°C. 

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Great OFC coverage by LightCounting. TeraSignal’s Intelligent Re-Driver in CMOS is changing the power, reliability and performance calculus between DSP and LPO modules.

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Feeling "semiconductored?" Kevin Parmenter relates — and has a thing or two to say about it. Check out his op-ed on EE World Online today. Taiwan Semiconductor Martin Rowe Bill Schweber Jeff Shepard Rakesh Kumar, Ph.D. Aharon Etengoff Emma Lutjen Greg Evans #discretesemiconductors #componentshortages #supplychainresilience #alternativedesigns #discretecircuits #ICchortages #designengineering #electronicsmanufacturing #supplychainshallenges #futureproofdesigns

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Semiconductor Industry Association Outlines Industry Recommendations for the National Semiconductor Technology Center 🇺🇸💡 SIA released a set of recommendations to promote the success of the National Semiconductor Technology Center (NSTC), a critical public-private research consortium established by the CHIPS and Science Act. SIA’s recommendations synthesize the most up-to-date industry consensus and priorities. The CHIPS & Science Act included the most significant federal investment ever made in chip research and development (R&D), committing a substantial $13 billion across the Departments of Commerce and Defense. The cornerstone of the CHIPS R&D program is the NSTC, a more than $5 billion initiative tasked to “conduct research and prototyping of advanced semiconductor technology and grow the domestic semiconductor workforce to strengthen the economic competitiveness and security of the domestic supply chain” (15 U.S.C. § 4656(c)(1). Since passage of the CHIPS Act, leading stakeholders have issued several valuable reports detailing recommendations and priorities for the initiation and operation of the NSTC. This body of work represents an emerging industry consensus that should form the guiding basis for the CHIPS R&D Office (CRDO) and Natcast—the new, purpose-built, non-profit entity created to operate the NSTC Consortium—in the establishment and operation of the NSTC. A big thank you again to Semiconductor Industry Association for the full article with more background and insights including the full report as FREE PDF Download via the link below 💡🙏👇 https://lnkd.in/e5aBA-K8 #semiconductorindustry #semiconductors #semiconductor #technology #tech #it #chips #innovation #chip #geopolitics #subsidies #usa #talent

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To our knowledge, no North American River Otters currently subscribe to the TechInsights Semiconductor Information Platform. Coincidence? Surely not! Be more informed than your local semi-aquatic critter by checking out the go-to answer to your semiconductor information and analysis needs. Take a look at this article on how #AdvancedPackaging will help semiconductors continue to drive industries forward: https://bit.ly/4c2Nwk8

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Advanced Packaging Is Radically Reshaping the #Chip Ecosystem 💡 Periodically, analysts commenting on the chip industry will pronounce that Moore’s Law is obsolete. Yet while the speed of progress is slowing down, #chipmakers are still doubling the number of #transistors on an integrated circuit (#IC) approximately every 2.5 years. In the past, fundamentally new approaches for chip design never seemed to catch on. That’s no longer the case as fresh ideas that are essential for running some of today’s most important applications are rapidly gaining favor. One of the most significant of these new concepts is #advancedpackaging, which essentially accommodates an ever-increasing number of transistors by decreasing the size of electrical contacts. Traditionally, a #semiconductor chip focuses on performing one particular action or process. By comparison, an advanced multichip package incorporates multiple chips and processes into one component. This transformative approach integrates a multitude of semiconductor components into a single package, directly addressing the most critical semiconductor technical and commercial constraints. A very big thank you to my friend Dr. Karl Breidenbach and his colleagues Joseph Fitzgerald, Jan H. Mohr, Dr. Nadim Sah, Dr. Jörg Jeschke, Dr. Karl Breidenbach, Nicola Kerschbaumer,  Sohini Kar from Boston Consulting Group (BCG) for the full article with more background, charts and insights via the link below 💡🙏👇 https://lnkd.in/eVvUhbKf #semicondcutorindustry #semiconductors #semiconductor #chip #ic #technology #tech #chiplets #chiplet #foundry #innovation #icdesign #tsmc #samsung #intel #geopolitics #usa #taiwan #southkorea #it #ai

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PHELOS Gonio-Spectrometer for Angle-Dependent EL and PL Measurements Phelos is an angular luminescence spectrometer to characterize light-emitting devices and thin films over varied emission and polarization angles. While traditional goniometric instruments focus on either electroluminescence (EL) or photoluminescence (PL), Phelos incorporates both measuring techniques in one table-top compact instrument. The Phelos software can be easily coupled to the powerful simulation software Setfos for data analysis, parameter extraction, and device modeling. #SOLARCELL #PEROVSKITE #OLED #PVSOLARCELL

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GaN HEMTs (High Electron Mobility Transistors) are particularly well-suited for applications requiring high-frequency performance in the medium voltage range. Gain a better understanding of GaN HEMTs with our blog post in collaboration with ROHM Semiconductor Americas. #MOSFETS #GaN #PowerElectronics

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Success Story – MEMS Microfluidics Wafer Probe System Applicationhttps://hubs.ly/Q02BkK0J0

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DISCUSS SOLUTIONS FOR REAL-TIME CORRECTION OF ATMOSPHERIC TURBULENCE. Thursday, May 16th 2024: 10AM EDT 4PM CEST - FREE ALPAO webinar hosted by Optica. Don’t miss this one! ALPAO is an active Optica corporate member headquartered in Montbonnot-Saint-Martin, France but active globally with their deformable mirrors in many markets. WHEN: Next Thursday, May 16th 2024, Alpao is partnering with Optica for a live 60-minute industry webinar starting at 7 AM PDT, 10 AM EDT, 3 PM UK/Ireland/Portugal, and 4PM CEST. REGISTER: Immediately for your free seat in the Zoom Room: https://lnkd.in/eSj27GyY SPEAKERS. We are delighted to welcome these industry specialist speakers on board: Dr Olivier Guyon - Worldwide Renowned Astronomer at Subaru Telescope Naoj, winner of MacArthur Fellowship in 2012 and Dr David Barr - RTC Engineer at UK’s Durham University. This is a genuine opportunity to learn and engage with leading experts in this field. Get your questions ready! WHAT IS IT ABOUT?: During the session, we will explore cutting-edge, real-time computer-driven astronomy and its pivotal role in advancing laser optical communication to correct for natural atmospheric turbulence. By combining breakthroughs in both hardware and software, ALPAO’s fast deformable mirror technology enables optimal compensation for this effect. This enables researchers to process vast amounts of data instantaneously and uncover celestial phenomena in unprecedented detail. One of the most exciting applications of real-time computation is its integration with laser and quantum communication technologies. Whether you're an astronomy enthusiast, a communications engineer, or simply curious about the latest advancements in science and technology, this webinar offers a unique opportunity to gain knowledge and engage directly with specialists. ALPAO is a great example of a successful optics company taking maximum advantage to engage with Optica’s 600+ trusted global corporate network. (Their solutions range from QKD free space optics coms in aerospace to cutting microscopy firmly back on earth. I last heard a reference to Alpao during our visit to the University of Rochester Medical Center’s Schallek Lab, part of the Advanced Retinal Imaging Alliance. Watch here https://lnkd.in/d-SuCTQk. But I digress). By way of a preview of the upcoming webinar, below is a clip from our recent Optica Industry Meeting on FreeSpace optics, where Julien Charton founder and CSO at Alpao gave us an update on how their technology applies to NewSpace. Onward and upward!

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Nice write up Bolaji ... it certainly seems that my and the SIA President John Neuffer's view on the market are diametrically out of step. Strange because the 5.7% Q1-2024 decline was SIA (WSTS) data! I chose to look at the quarter on quarter trends, whereas he looked Q1-2024 vs Q1-2023. Which is more meaningful? I'll leave that for you all to decide, but I know where my vote lies. If you want to know more, check out our recent webinar slide presentation and video at https://lnkd.in/dUVDriF8

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A report in the #NYTimes today indicates stimulus from #CHIPS Act already appears to be taking effect.  Done right, we could see more than 30% of the most advanced logic devices manufactured domestically by 2032, up from basically zero today. The result is a change in the total percent of semiconductor devices changing from a downward trend towards less than 10% of global #semiconductormanufacturing to more than 14%. While this may not seem like a major change, consider that all global regions are simultaneously investing heavily in production and we begin to understand how significant this reversal actually is. The National Semiconductor Economic Roadmap (#NSER, https://lnkd.in/gtSGMNjt) modeled and predicted these trends almost 18 months ago (Exhibit 3, below) based upon US leadership in manufacturing capacity investments, and how supply chain, entrepreneurship, infrastructure, and workforce development would be the cornerstones of this resurrection. We’ve seen multiple incentives planned, the directives made for a National Semiconductor Technology Center (#NSTC, #NATCAST) and National Advanced Packaging Manufacturing Program (#NAPMP), supplier funding incentives being communicated, and most recently the announcement by #NIST of the CHIPS Manufacturing USA Institute (https://lnkd.in/g_wb5dXG) dedicated to advancing innovation and productivity through digital twinning across the ecosystem to create a global digital twin for manufacturing, arguably this industry’s moonshot! Let’s align around the spirit of this stimulus and regain our leadership position in semiconductor manufacturing. https://lnkd.in/gwCzSJM5

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Sahita Technologies is dedicated to empowering companies and nations to gain a competitive edge in the semiconductor and manufacturing sectors. Our comprehensive consulting services encompass: 🔧 Advanced Manufacturing ✅ Quality Assurance 🚚 Supply Chain Optimization 👩‍🏭 Workforce Development 🛠️ Framework Development 🎥 Semiconductor Workforce Documentary Join us in driving the smart manufacturing revolution! We specialize in creating robust semiconductor and manufacturing frameworks, strategic workforce solutions, and fostering vital industry-academic collaborations. 🤝 We're at the forefront of integrating technology and media to engage the next generation of students and professionals. 🚀 Join us in shaping the future of manufacturing and semiconductors! Together, we can drive innovation, excellence, and growth. Current engagements: ▪University of Texas at Dallas - Build workforce strategy for the North Texas Semiconductor Institute ▪Consult with research firms and investors on current needs and future trends ▪Partner: SRC Semiconductor Manufacturing and Advanced Research with Twins (SMART) USA Institute ▪Industry-Academia Collaborations: Fostering partnerships between educational institutions and the semiconductor industry. #Semiconductors #Manufacturing #WorkforceDevelopment #SmartManufacturing https://lnkd.in/gQvH3fwT

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3 books to conquer Semiconductor Packaging and Assembly: 🚀 Semiconductor Manufacturing Handbook, Second Edition by Hwaiyu Geng This book is a comprehensive guide to the entire semiconductor manufacturing process, including packaging and assembly. It covers all the major steps involved, from wafer fabrication to final testing, in a clear and concise way. This book is a great resource for anyone who wants to get a good understanding of semiconductor packaging and assembly. 🚀 Microchip Fabrication: A Practical Guide to Semiconductor Processing, Sixth Edition by Peter Van Zant This book focuses specifically on the wafer fabrication process, but it also includes a good overview of packaging and assembly. It provides a more in-depth look at the processes involved in making semiconductor chips, which can be helpful for understanding how packaging and assembly fit into the overall picture. 🚀 Advanced Semiconductor Packaging Fundamentals by Philip G. Fouras and Richard S. Payne This book is a more advanced look at semiconductor packaging and assembly. It covers a wide range of topics, including materials, processes, and reliability. This book is a good resource for engineers who want to learn more about the technical aspects of packaging and assembly. A detailed post with book links in comments. For all semiconductor and AI related content, follow TechoVedas

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My article on Semiconductor Packaging  .. please write in comments what more you would like to read about semiconductor packaging  https://lnkd.in/giXs5DJX

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