Happy #CostModelMonday! I did a #fan-out panel-level versus wafer-level comparison at #IMAPS DPC this year, and I'm expanding on it for the IMAPS Symposium. I had a single #yield chart in my analysis previously, looking at yield crossover points in relation to how expensive the incoming chip was. I did a new analysis that looks at when the crossover point occurs for two different panel sizes. In this chart, the same package is built with fan-out packaging on a 300mm wafer and from two different panel sizes. The yield for the 300mm wafer example is held steady at 99%, while the yield is changed for the panel-level processes. For the package built with the 515x510mm panel, the crossover point occurs just past 95%. However, the crossover point is closer to 94% for the package from the 600x600mm panel. In other words, a little more yield loss can be sustained by the package from the larger panel before it no longer competes with a higher yielding package from the wafer.
Amy Lujan’s Post
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