Questions tagged [instruction-set]
Instruction set refers to the Assembly syntax based on a processor's architecture that interacts with its registers within the processing unit itself. There is a large variety of instruction sets including: MIPS, ARM, 68HC11/12, x86, and so forth.
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What does this mean in RISC-V opcode table
I want to check my understanding of how the imm[20|10:1|11|19:12] specifies the bit arrangements in the JAL (jump and link) instruction in RISC-V architecture?
I ...
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1-bit computing with true one-instruction set architecture
Even though MC14500B is considered as 1-bit computing where it accepts 1-bit data to perform operation, the instruction set itself consisted with 4-bit instruction which leads having 16 total ...
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What is the number of immediates that can be represented ARM data processing instructions?
Data-processing instructions have an unusual immediate representation involving an 8-bit unsigned immediate, imm8, and a 4-bit rotation, rot. imm8 is rotated right by 2 × rot to create a 32-bit ...
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How to implement the Instruction Set in Logisim
I have an assignment that requires me to build an 7-bit CPU. I’m done with implementing some of the requirements that includes 4 8-bit registers (the requirements say I have to store the parity bit), ...
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6502 Extra Cycles on Page Cross
On the 6502 processor, when using the Absolute,X, Absolute,Y or (Indirect),Y addressing ...
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How are `call` and `return` usually implemented in microarchitecture? [closed]
This is a follow-on from this question:
Are `call` and `return` usually instructions in a modern ISA?
I'd like to implement call and ...
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Are `call` and `return` usually instructions in a modern ISA?
I've been working through the problems in a game based around building a Turing Complete machine.
One of the final problems asks you to implement the call and ...
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Seeking clarification on equation used in MIPS assembly problem
I'm currently studying MIPS assembly code, and I'm having trouble understanding the solution for question (b) of a particular problem. I was hoping someone could help me clarify a specific part of the ...
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RISC-V byte load and store
I have the confusion in the following RISC V programming statements. Can someone explain that why does the contents of s0 in the last comment shown. shouldn't it be 0x00000180 the same as we are not ...
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How can I do immediate addition in the Atmel AVR instruction set?
I've been doing some AVR assembly programming for a university course, and I recently happened upon a situation where I would have wanted an "add immediate" instruction. However, no such ...
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Designing instruction emulating swap on a MIPS ISA with only 2 registers
In a typical MIPS ISA, you have only 2 working registers. But you have a large number of ALU units.
How to design an instruction to emulate swap?
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How do you fit so many instructions on a 8-bit processor?
I will preface this that it is highly likely that I have misunderstood how Harvard architecture works, but I cannot understand how an 8-bit instruction set, say the ATmega128 for example, can contain ...
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Does an ASIC have an instruction set? [closed]
Does an Application Specific Integrated Circuit have an instruction set like a CPU?
If yes, then that would contradict the statement "ASIC is faster than CPU" because having an instruction ...
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How much energy does it take to schedule versus execute a CPU instruction?
One of the justifications for vector instructions is that in a modern CPU, it takes more work to decode an instruction and do all the administrative work around it – scheduling, register renaming and ...
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How we are giving values to source registers in instruction set architecture?
This figure represents RISC-V R-type instruction. Let assume this instruction is for add operation. When this instruction is given to the processor it adds rs to rt.
My question is how rs and rt ...
