Steve Wozniak

AI workflows are driving demand for memory and storage to prepare data, train the model and create useful inference engines.  This is driving announcements of storage and memory products that support the various elements of these AI workflows.

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PCIe Gen6 + 5nm + MRVL SerDes = Lowest Power for AI!!

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Join our joint Nvidia & SecEdge webinar on April 25 to learn more about Securing Edge AI Models at rest and in transit.

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Go GaN - From power to RF: GaN’s journey to a US$4.35B market by 2029 !

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SK hynix: #GDDR7 Mass Production To Start in Q1'2025 Being a major JEDEC #memory standard, GDDR7 is slated to be produced by all three of the Big Three memory #manufacturers. But it seems that not all three vendors will be kicking off mass production at the same time. #SKhynix was at this year's #Computex trade show, showing off their full lineup of memory #technologies – including, of course, GDDR7. SK hynix is the last of the major memory vendor's we've seen promoting their memory, and fittingly, they seem to be the last in terms of their mass production schedule. According to company representatives at the show, the firm will not kick off mass production of their GDDR7 chips until the first quarter of 2025. Thanks again to Anton Shilov and AnandTech for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eEMBgD_N #semiconductorindustry #semiconductors #semiconductor #technology #tech #innovation #ai #semiconductormanufacturing #dram #mobile #it

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My talk for the #IEEE solid state circuits society is public on youtube! Learn how I got started, the mistakes I made, and how you can get involved in this exciting world of #opensource silicon and #ASIC! https://lnkd.in/d4dCp7y2

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Modernizing your infrastructure and making room for AI is MUCH easier than you think with AMD EPYC.

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Digital storage demand is increasing and this creates a need for more advanced storage technologies to support a robust digital mass storage hierarchy.  The IEEE IRDS Mass Storage Roadmap outlines projections for NAND flash, emerging non-volatile memories, HDDs, magnetic tape, optical recording and DNA storage development. https://lnkd.in/g8qwRvC7

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Western Digital Talks High-Density BICS8 2TB QLC #NANDFlash on a single #Memory #Chip 🤩🤯💡 #WesternDigital previewed its new #BICS8 (218-layer) QLC #NAND #flash memory chip with a 2TB capacity at recent investor activities. This chip is recognized for having the highest density in the industry. The BICS8 2TB QLC NAND flash memory chip is designed specifically for #datacenters and #artificialintelligence (#AI) applications. It aims to reduce the cost of high-capacity enterprise-level solid-state drives (#SSDs) and meet the growing demand for large-scale #datastorage solutions. A flash memory particle consists of multiple flash memory chips stacked and packaged together. A single chip with 2TB capacity allows Western Digital to offer 4TB capacity particles through 16-layer stacking, which facilitates the development of future 128TB or even 256TB enterprise-level SSDs. Robert Soderbery, the General Manager of Western Digital's flash memory business, demonstrated the BICS8 2TB QLC NAND flash memory chip at the event. The chip is approximately the width of a fingertip. Western Digital's BICS8 #technology, developed in partnership with KIOXIA Group, uses a CBA (Complementary Bonding Approach) technology similar to Yangtze Memory Technologies Xtacking. This method involves manufacturing the storage stack and #CMOS control circuit separately, then #hybridbonding the two parts. This approach enhances the read and write performance of the flash memory while increasing overall storage density and reducing power consumption. Thanks to Hilbert Hagedoorn and www.guru3d.com for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/erwRNMgU #semiconductorindustry #semiconductors #semiconductor #technology #tech #innovation #Japan #usa #datastorage #ssd #nandflash #ai #it

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https://lnkd.in/gAvcXnNQ Interesting article, and absolutely true that the more advanced the node the more relevant simulations become. Although this one refers to Synopsis simulation, there are more solution providers including ASML.

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Interesting to see massive deployment of AMD chips for AI datacenter.

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Good analysis and overview of the supply and demand history from chip manufacturing to HPC products to the end customers.

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AI has recently catalyzed a shift toward disaggregation in the semiconductor industry and last Friday, I spoke with an engineering executive about this. Our discussion focused on NVIDIA’s dominance in AI hardware and he emphasized how important flexibility and choice are… fitting as we headed into Memorial Weekend. He said NVIDIA won’t go anywhere soon but the future belongs to companies that empower their customers with more choices. Long-term success in AI necessitates adapting to an ever-evolving technological landscape, and companies with monolith-like platforms such as NVIDIA’s will struggle to adjust. Yet one of his main concerns is the need for greater support for open architectures like RISC-V, and I couldn’t agree more. RISC-V is a key to unlocking a more democratic semiconductor ecosystem, which is why I’m encouraged by the work being done by companies like MIPS A pioneer in RISC-V development since its founding in the 80’s, MIPS saw their early success wane in the 90’s as the market was flooded with competing designs. After a series of sales and transitions, the company was near obscurity. However, like a Phoenix, MIPS has had a remarkable resurgence. The transformation began with their re-adoption of RISC-V in 2022. Last fall, the board appointed Sameer Wasson as CEO and he was later joined by RISC-V luminaries Drew Barbier and Brad Burgess from SiFive. Now, with the benefit of hindsight and visionary leadership, MIPS is once again fully committed to advancing RISC-V. By helping customers migrate their software code to open-source RISC-V, they’re breaking down the barriers of traditional architectures and demonstrating themselves as an ecosystem builder. Last month they announced a significant expansion of their partnership with Synopsys, further solidifying that commitment. This shift towards open architectures represents a huge opportunity for MIPS to help foster innovation, encourage competition, and enable a more democratic semiconductor ecosystem; virtues that many of the leaders and engineers I talk with every week care deeply about. It’s great to see MIPS growing again, and my encouragement to their leadership is this: emphasize the importance of your mission in conversations with curious engineers and leaders pursuing roles with the company. Go even further by integrating screening questions about your mission and values. Being excited for new engineering challenges is one thing, but being committed to making a difference in the world requires another level of dedication. #semiconductorindustry #artificialintelligence #RISCV

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UCIe is crucial for high performance computing. Explore the Cadence UCIe demo to learn about chiplet interconnect features and the future of chiplet technology in SoCs. Watch William G. Wong's interview with Mayank Bhatnagar, Product Marketing Director at Cadence: ⤵️ https://lnkd.in/egkSKweu

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To overcome the challenges posed by the increasing demands of #AI, etching techniques must deliver high levels of parallel processing, non-volatile memory, and fast data transfer rates. Gate-all-around transistors, 3D NAND memory, and high bandwidth memory are integral to AI’s future — learn more from Lam Research. https://bit.ly/3xa0AVF . #LifeAtLam

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Arm Compiler for Linux 24.04 is now available, offering improvements on SPECcpu(r)2017. We're also release Arm Performance Libraries 24.04, with a new Random Number Generator, useful for #ML in #PyTorch.

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The #Linux 6.9 kernel is now officially out, bringing with it weighted interleaving for memory tiering — a key enabler for optimized utilization of #CXL #memory right out of the box without additional SW!

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More resources for Versal users: Swift Launch Developer’s Kit for Versal Devices from BLT. This is a solution designed to accelerate your development process for AMD Versal devices and bring your project schedules forward by months. Swift Launch takes the complexity of designing for Versal devices and simplifies it. Input your custom algorithms into Swift Launch and the output is ready to run on hardware. What you get: - Reference Design - Unified Documentation - Support - Optional Add-on: Custom Integration - Optional Add-on: Training #amd #xilinx #versal #blt #support #resources #referencedesign #fpga #soc #documentation #link #schedules #designcomplexity #simplify #swiftlaunch #hardware #training #custom #integration #algorithms #learningcurve #challenges #ttm Link for more information: https://lnkd.in/grczprgG

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