Linsey Miller

Contract Price Increases Offset Seasonal Slump, Boosting #DRAM Q1 Revenue by 5.1%, Says TrendForce Corporation TrendForce reveals that the #DRAM industry experienced a 5.1% revenue increase in 1Q24 compared to the previous quarter. This growth—reaching US$18.35 billion—was driven by rising contract prices for mainstream products, with the price increase being more significant than in 4Q23. As a result, most companies in the industry continued to see revenue growth. The top three suppliers experienced a decline in shipments in the first quarter, demonstrating the industry’s off-season effect. Additionally, downstream companies had higher inventory levels, which led to a significant reduction in #procurement volume. As for ASP, the top three suppliers continued to benefit from contract price increases seen in 4Q23. With inventory levels still healthy, there was a strong intention to raise prices. #Mobile DRAM saw the highest price increase out of all applications thanks to strong sales of Chinese #smartphones. On the other hand, the price increase for consumer DRAM was the lowest among all applications, as manufacturers still need to clear their inventories. Thanks again to TrendForce Corporation for the full article with more background and insights via the link below 💡🙏👇 https://lnkd.in/eXyJeY8D #semiconductorindustry #semiconductors #semiconductor #technology #tech #informationtechnology #memory #smartphones #pc #notebook #server #mobile #artificialintelligence #ai #aiot #chip #chips #geopolitics MEMPHIS Electronic Intelligent Memory Neumonda Samsung Electronics Micron Technology SK hynix Nanya Technology Winbond

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When revenue and profitability don't follow investments fast enough. however there is no short cut in 3rd generation of Semi Conductors. the facts are they last 30y+ Wolfspeed has been leading the transition. at all steps of the supply starting from Materials, and it wouldn t be fair to treat them as a speculative asset ...! yet they need to generate revenue faster https://lnkd.in/giznB2n5

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When adding stitching vias to a PCB, strategic placement is crucial. It's essential to position them around the edges of critical components, high-speed signal traces, and ground planes. This ensures effective shielding and enhanced signal integrity. The appropriate size and spacing of stitching vias are chosen based on your application's specific requirements and the PCB's material. #PCBdesign

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It was great to spend some time with Ben Bajarin on The Circuit Podcast discussing the basics of #FPGAs, market insights, and Lattice Semiconductor’s focus as the low power programmable leader. Give it a listen: https://bit.ly/4c6F6rk

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#HBM Prices to Increase by 5–10% in 2025, Accounting for Over 30% of Total #DRAM Value, Says TrendForce Corporation 💡 Avril Wu, TrendForce Senior Research Vice President, reports that the HBM market is poised for robust growth, driven by significant pricing premiums and increased capacity needs for AI #chips. HBM's unit sales price is several times higher than that of conventional DRAM and about five times that of #DDR5. This pricing, combined with product iterations in AI #chip #technology that increase single-device HBM capacity, is expected to dramatically raise HBM’s share in both the capacity and market value of the DRAM market from 2023 to 2025. Specifically, HBM’s share of total DRAM bit capacity is estimated to rise from 2% in 2023 to 5% in 2024 and surpass 10% by 2025. In terms of market value, HBM is projected to account for more than 20% of the total DRAM market value starting in 2024, potentially exceeding 30% by 2025. A big thank you again to Avril Wu and TrendForce 集邦科技 for the full article with more background and insights via the link below 🙏💡👇 https://lnkd.in/eDC9_Z7u #semiconductorindustry #semiconductors #semiconductor #tech #micron #skhynix #samsung #foundry #innovation #ai #nvidia #tsmc #server #it #ic

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Devices that benefit most from LPDDR4X are those requiring efficient power management and high-speed data processing, such as smartphones, tablets, and other portable or embedded systems. Its low voltage operation and high data rates make it ideal for running advanced applications and handling demanding tasks.

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Power consumption was the main topic at OFC 2024 in San Diego, CA. The g.metro discussion has laid out many things including the idea of providing telemetry data. What this can do and how transceiver customization in access networks can optimize power consumption is the topic of this week's article. Enjoy the read. #tranceiver #access #photonics #gmetro #power #energysavings

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Yeah, no. That's what a friend from high school would say quite often. It meant no, with the 'yeah' up front acknowledging the validity of the topic. For example, "Did you get the last problem on the geometry homework?" would be followed with a "Yeah, no". That phrase came to mind today when reviewing the latest release of the Movellus AWM3 targeted at droop management because while I've been blessed to be in this industry long enough to see tremendous changes, engineering challenges getting easier is not one of them. Hence the question, "Are modern tools and IP making life easy for today's SoC designers?" yields the response "Yeah, no." The demands placed on SoC engineering teams are staggering - shrinking resources, a relentless push for increasing performance with decreasing power, the inevitable tight deadlines, and now the staggering demands of advanced AI architectures all yield an environment with shrinking to vanishing margins leading to unavoidable excursions into unwanted behaviors like voltage droop. But isn't this a well-understood phenomenon with lots of tools and design technique choices to resolve it? Yeah, no. This is the gauntlet that Movellus have picked up, despite the fact that developing IP to resolve voltage droop is as or more complex than the droop itself. It requires a deep understanding of the issue across many vectors - level of droop, timing of the droop, slope of the droop, solution implementation tolerances, etc. not to mention the complexity involved in finding a way to test a problem that is enigmatic and ethereal by nature. And when Movellus released the fastest droop mitigation solution in the industry last year were customers thrilled and eager to engage? Of course! Were they satisfied? Yeah, no. But that's to be expected. Are customers really ever satisfied? Don't they always want more/faster/better/cheaper/smaller? So the Movellus engineers sharpened their proverbial pencils and went to work, and in an incredibly short time span took the industry's fastest droop mitigation system and made it faster, and better, and smaller. Does anyone else offer a solution for DFS/DVFS with droop mitigation at this speed that provides advanced clock telemetry for analytics? Yeah, no. So now are Movellus satisfied that they've slayed the hardest SoC design challenges, so they can finally rest on their laurels? Yeah, no. #staytuned

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Few #QLC #SSD suppliers remain in the market as enterprise SSD contract prices are expected to rise through Q3 according to TrendForce. #Samsung has been dominating the market share in the enterprise SSD sector with over 40% in 4Q23, while #Solidigm, a long-time player in QLC enterprise SSDs, held a combined market share (#SKGroup) of 32%. Other suppliers with market shares below 10% are expected to see limited growth potential. #Solidigm plans to expand its production of 144-layer devices in 2H '24 due to rising QLC orders, while Samsung, which focuses on 176-layer devices and faces no significant competitors, is benefiting from the tight supply of high-capacity QLC products. This is expected to drive enterprise SSD contract prices up through the third quarter with an estimated quarterly increase of 5% to 10%. Source: https://lnkd.in/dtACU5q7

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Sahita Technologies is dedicated to empowering companies and nations to gain a competitive edge in the semiconductor and manufacturing sectors. Our comprehensive consulting services encompass: 🔧 Advanced Manufacturing ✅ Quality Assurance 🚚 Supply Chain Optimization 👩‍🏭 Workforce Development 🛠️ Framework Development 🎥 Semiconductor Workforce Documentary Join us in driving the smart manufacturing revolution! We specialize in creating robust semiconductor and manufacturing frameworks, strategic workforce solutions, and fostering vital industry-academic collaborations. 🤝 We're at the forefront of integrating technology and media to engage the next generation of students and professionals. 🚀 Join us in shaping the future of manufacturing and semiconductors! Together, we can drive innovation, excellence, and growth. Current engagements: ▪University of Texas at Dallas - Build workforce strategy for the North Texas Semiconductor Institute ▪Consult with research firms and investors on current needs and future trends ▪Partner: SRC Semiconductor Manufacturing and Advanced Research with Twins (SMART) USA Institute ▪Industry-Academia Collaborations: Fostering partnerships between educational institutions and the semiconductor industry. #Semiconductors #Manufacturing #WorkforceDevelopment #SmartManufacturing https://lnkd.in/gQvH3fwT

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"Scotty we need more power!" For those of use old enough to remember Star Trek TOS (and if you don't know what that is I'll wait for you to visit the wikipedias...) this phrase is burned indelibly into our brains. Invariably some nefarious force was holding the Enterprise against its will, or the ship was trying to outrun a baddie, or an incoming energy bolt threatened the integrity of the hull, and always the solution was "more power". The world we live in today is quite different. Not to say that the need for compute power has reduced, in fact quite the opposite given the enormous computational requirements of modern AI and HPC workloads. But that "power" must now be weighed against the power (energy) required to use it. In AI it's no longer about TOPS, it's about TOPS/W. And a laptop that dramatically outperformed its competitors but had only a 30 minute battery life would be considered fairly useless. So when the power (energy) requirements of datacenters start to be measured as a percentage of global energy consumption it's easy to see why managing and reducing power (energy) is a critical part of modern designs. Enter the Movellus Aeonic Power product family. By integrating the power supply for components of an SoC the power (energy) can be made more localized, smarter, more efficient, and the overall demand for energy can be reduced significantly. So rather than running all of your compute cores or AI acceleration clusters full tilt when only a few are needed, you can now modulate power at the core or block or cluster level to reduce the energy to precisely what is needed and no more, and this fine grained power control can yield immediate benefits. Advanced power savings like this were once attainable only by the largest and most advanced teams on the planet, but the field has been leveled. If you want to know more just send me a note, or come visit us at DAC 2024. Or just keep burning more energy than you have to, reducing your competitiveness and decreasing reliability, that's an option too... #AI #PowerDelivery #DAC2024

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Happy #CostModelMonday! I did a #fan-out panel-level versus wafer-level comparison at #IMAPS DPC this year, and I'm expanding on it for the IMAPS Symposium. I had a single #yield chart in my analysis previously, looking at yield crossover points in relation to how expensive the incoming chip was. I did a new analysis that looks at when the crossover point occurs for two different panel sizes. In this chart, the same package is built with fan-out packaging on a 300mm wafer and from two different panel sizes. The yield for the 300mm wafer example is held steady at 99%, while the yield is changed for the panel-level processes. For the package built with the 515x510mm panel, the crossover point occurs just past 95%. However, the crossover point is closer to 94% for the package from the 600x600mm panel. In other words, a little more yield loss can be sustained by the package from the larger panel before it no longer competes with a higher yielding package from the wafer.

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Any question about energy harvesting and our products ? Register now for this webinar tomorrow with my great colleagues Pierre LOUIS and Hussein Kassab

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𝗔𝗺𝗲𝗿𝗶𝗰𝗮 𝘁𝗼 𝗟𝗲𝗮𝗱 𝗚𝗹𝗼𝗯𝗮𝗹 𝗦𝗲𝗺𝗶𝗰𝗼𝗻𝗱𝘂𝗰𝘁𝗼𝗿 𝗚𝗿𝗼𝘄𝘁𝗵 𝗯𝘆 𝟮𝟬𝟯𝟮! What does a 203% increase in capacity signify for the U.S.? In an era marked by rapid technological advances and geopolitical shifts, the U.S. is set to redefine its stance in the global semiconductor industry. According to a recent report by the Semiconductor Industry Association (SIA) and the Boston Consulting Group (BCG), the U.S. will experience a groundbreaking 203% increase in semiconductor manufacturing capacity by 2032. This projection comes on the heels of the CHIPS and Science Act, which was enacted to revitalize America’s semiconductor production capabilities that had seen modest growth in the past decade. The report, titled “Emerging Resilience in the Semiconductor Supply Chain,” outlines not only a quantitative boost but a qualitative leap in U.S. manufacturing prowess, especially in advanced logic manufacturing, where the U.S. is set to hold 28% of the global capacity. This is a significant jump from virtually zero over the last decade, positioning the U.S. second only to Taiwan in terms of global semiconductor capital expenditures. Key findings highlight that the U.S. will increase its share from 10% to 14% of the world's total fabrication capacity, marking a historic pivot from the stagnation of previous years. This growth is fueled by over $450 billion in private investments and the creation of more than 56,000 new jobs within the semiconductor sector—bolstered further by CHIPS incentives. However, the landscape is not without its challenges. The SIA report points out potential supply chain risks, emphasizing the need for targeted, market-based investments rather than large-scale, non-market industrial policies that might lead to oversupply or overconcentration in certain semiconductor segments. Despite these hurdles, the path forward is clear. With the U.S. regaining its competitive edge in semiconductor manufacturing and innovation, it is poised not only to meet its own technological and security needs but also to play a pivotal role in shaping the global semiconductor landscape. Let's discuss how this growth impacts global tech and your business! #SemiconductorGrowth #CHIPSAct #InnovationLeadership

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#Sony #Semiconductor arm to reduce capital expenditures by roughly 30% over the next three years. Challenges in #investment #efficiency and #profitability prompt #Sony to curb investments in semiconductor solutions. New plant construction in #Kumamoto prefecture aligns with Sony's strategy to adjust to market demands for #image #sensors #Sony #semiconductor #imagesensor #IC #technology #investment #semiconductorindustry #research #profitability

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Stitching vias, also known as via stitching, are a crucial design practice for PCBs. By placing a series of vias around the perimeter of a ground plane or signal trace, a continuous conductive path is created, connecting the top and bottom layers of the board. #PCBdesign #viastitching

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