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There is a new STLINK-V3SET programmer that someone dropped off on my desk today. It supports USB 2.0. My thinking is that if SWD is the bandwidth limiter in the signal chain then a new programmer isn't very useful.

Is SWD or JTAG faster with ST-link programmers and what are those speeds?

Do I get any benefit in speed from the new STLINK-V3SET programmer?

Edit:

My targets are STM32F4, STM32H7 and STM32F2

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    \$\begingroup\$ JTAG/SWD speed depends on the target, layout and luck. Working dual digit MHz boards are rare. \$\endgroup\$
    – Turbo J
    Commented May 29, 2019 at 18:42
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    \$\begingroup\$ Can't answer because I'm using a Lauterbach debugger (which have USB 3 nowadays). The SWD speed you can reach is dependent on the clock you are running the controller with. More than a factor of 4 is hard to reach in my experience. Anything above 10 MHz seems also hard to reach (with just the wires I'm soldering to test points). Depending on how the debugger is working a reduced latency by USB 2.0 (if there is any) might actually be beneficial. For a peek breakpoint with my Lauterbach I'm not getting below 1 ms of interruption which hurts in some applications. \$\endgroup\$
    – Arsenal
    Commented May 29, 2019 at 18:46
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    \$\begingroup\$ In general SWD is slower than JTAG (because SWD multiplexes data going in both directions on a single wire), but keep in mind that in practice the "speed" is mostly limited by flash write/erase time, not necessarily by bus clock frequency. Debugging, setting breakpoints etc. is too fast to care in both cases. \$\endgroup\$
    – filo
    Commented May 29, 2019 at 20:18
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    \$\begingroup\$ @ChrisStratton I have a few projects that I need to get done, and I wanted someone else to have the opportunity \$\endgroup\$
    – Voltage Spike ♦
    Commented Jul 11, 2019 at 18:14
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    \$\begingroup\$ because the data can be slow to load if you have watched variables, and the debugger transfers more information the more watched variables you have. Speed is also useful for looking at memory. \$\endgroup\$
    – Voltage Spike ♦
    Commented Dec 22, 2021 at 16:30

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