Siemens EDA (Siemens Digital Industries Software)’s Post

Even minor process variations can significantly impact yield and time-to-market. This is where Tessent Hi-Res Chain software can help, designed to address the critical challenges faced by integrated circuit (IC) design and manufacturing teams in advanced technology nodes. "Tessent Hi-Res Chain represents a major leap forward in our ability to rapidly identify and address yield-limiting factors in advanced IC designs," said Ankur Gupta, vice president and general manager of the Digital Design Creation Platform division, Siemens Digital Industries Software. "By providing unprecedented accuracy and resolution in defect isolation, we're empowering our customers to accelerate their yield ramp and improve time-to-market for cutting-edge semiconductor products." Read the full news story coverage via the link in our comments!

Siemens is at the forefront of innovation once again, bringing advanced multiphysics and AI to chip design! A recent Forbes article highlights our groundbreaking work in integrating these cutting-edge technologies, enabling designers to tackle the most complex challenges in semiconductor design. By leveraging multiphysics simulations and AI-driven methodologies, we're not only enhancing performance but also driving efficiency and reliability in chip design. Read the full article to learn how Siemens is revolutionizing the future of chip design: https://sie.ag/7LKvEq

🎉 Thank You for an Amazing #DAC! 🎉 As #61DAC wraps up, we want to extend a heartfelt thank you to all our customers and partners who visited the Siemens booth. Your enthusiasm for our latest solutions in semiconductor design and verification made this event truly special! Enjoy the final day of conferences and exhibitions, and let's keep the momentum going. Together, we will continue to push the boundaries of innovation in chip design! 

#DYK that our ongoing collaboration with Intel Foundry has established a new Electronic Design Automation (EDA) product certification, as well as an embedded multi-die interconnect bridge (EMIB) enablement breakthrough that can help mutual customers take advantage of the performance, space and power efficiency advantages of 3D integrated circuit (3D-IC) designs much more quickly. Together we recently certified Siemens' new Solido SPICE, part of Solido Simulation Suite software for the foundry’s Intel 16 and Intel 18A nodes. An advanced portfolio of AI-accelerated simulators for intelligent IC design and verification, the new Solido Simulation Suite provides leading-edge, feature-rich circuit verification for analog, mixed-signal, RF, memory, library IP, 3D-IC and System-on-a-chip (SoC) design. Intel 18A represents the latest advancement in Intel Foundry’s process technology roadmap, featuring advanced RibbonFET gate-all-around (GAA) transistor architecture and PowerVia backside power delivery technologies to help customers optimize the density and performance of their next-generation products. Intel 18A is ideal for IC designs targeting high growth applications including the High-Performance Computing (HPC), mobile and other demanding and fast-growing applications. Intel 18A and Intel 16 are also now enabled with Open Model Interface (OMI), the industry-standard platform for enabling aging modeling and reliability analyses, supported by Siemens’ Solido Simulation Suite. “Siemens is committed to collaborating with Intel Foundry to provide our mutual customers with the most advanced technologies possible to leverage when designing highly complex ICs and advanced packaging,” said Amit Gupta, our VP and general manager, Custom IC Verification. “The certification of Solido SPICE and the availability of the EMIB reference flow for early customers by Intel reinforce our joint commitment to providing mutual customers with highly accurate, next-generation tools that enable innovation required to differentiate and win in highly competitive markets.” “Intel Foundry is revitalizing the semiconductor industry with new fabrication and highly innovative advanced packaging technologies targeted at taking modern day electronics to entirely new levels. Our collaboration with Siemens for precise EDA enablement is key to nurturing the growing ecosystem” said Suk Lee, VP & GM of Ecosystem Technology Office, Intel Foundry. “The recent certification of Siemens’ newly released Solido SPICE, part of Solido Simulation Suite, to run seamlessly on our advanced process technologies underscores the success we’ve seen in our ongoing close collaboration with Siemens. And by developing a certified, production ready EMIB technology reference flow, Intel Foundry and Siemens EDA have delivered yet another major milestone, empowering IC design companies to boldly innovate complex ICs for any electronic application.” https://sie.ag/5DBpsW #EDA #Certification #EMIB

Join Us for a Cocktail Reception at #DAC! You're invited to a special cocktail reception at our Siemens booth during DAC 2024! 🗓️ Date: June 25th, 2024 🕔 Time: 5:00 PST 📍 Location: Siemens Booth #2521, Level 2, Moscone West Convention Center Come mingle with industry experts, enjoy delicious drinks, and discover our latest innovations in semiconductor design and verification. Don’t miss this opportunity to network and unwind with fellow professionals! We look forward to seeing you there!

We're excited to launch a fully automated solution to help integrated circuit (#IC) design teams rapidly identify and address electrostatic discharge (#ESD) issues driven by the growing complexity of today’s next-generation IC designs, regardless of targeted process technology. Combining the power of our Calibre PERC software with the proven SPICE accuracy of its AI-powered Solido Simulation Suite, it provides a fast and highly accurate method for checking compliance against foundry rules spanning all phases of IC design. Supporting full-chip level verification, the solution helps engineering teams better manage design and manufacturing challenges in both established and emerging process nodes. Its context-aware checks can help to improve the accuracy of results, while reducing turnaround time for physical, circuit, electrical and reliability IC design verification. Context-aware checking allows design teams to verify ESD paths quickly, in time to secure waivers from foundry rules that can lead to smaller die sizes and optimized designs – ultimately helping design teams quickly arrive at data driven decisions 8x faster than current methods. “Siemens’ new context-aware ESD simulation solution can help deliver accurate reliability assessment for complex IC designs,” said Silicon Labs’ Michael Khazhinsky, Principal ESD Engineer of Central R&D. “The push-button solution integrates dynamic simulation results from Solido into a full-chip Calibre PERC result that can be used to quickly determine if designs are electrically robust. In the event of circuit errors, this Siemens solution identifies nets and devices that need to be improved.” Automated context-aware IC design verification can now become a best practice, helping the quick delivery of reliable and timely IC chips to market. Featuring functionalities such as automated voltage propagation, voltage-aware design rule checking, and the integration of physical and electrical information within a logic-driven layout framework, it helps design teams working to tight schedules. "By leveraging automated context-aware checking, Siemens is empowering design teams to address more quickly the complexities of modern IC design reliability verification," said Michael Buehler-Garcia, our VP of Calibre Product Management. " This integration combines the strengths of our dynamic simulation from Solido and sign-off level ESD verification in Calibre PERC. Our integrated solution speeds up the verification process while at the same time ensuring the reliability of IC designs, helping our customers achieve their goals more efficiently. This is the first in a series of solutions that Siemens plans to provide that leverage offerings from different elements of our software portfolio to speed overall design cycle time." https://sie.ag/4S3ENN #EDA #IC #Verification

#News!📣 Introducing Innovator3D IC - a comprehensive multiphysics cockpit for #3D #IC design, verification and manufacturing! This new software delivers a fast, predictable path for the planning and heterogeneous integration of ASICs and chiplets using the latest and most advanced semiconductor packaging 2.5D & 3D technologies and substrates in the world. It provides a consolidated cockpit for constructing a digital twin -- featuring a unified data model for design planning, prototyping and predictive analysis -- of the complete semiconductor package assembly. This cockpit drives implementation, multi-physics analysis, mechanical design, test, signoff, and release to manufacturing. “Siemens already had the most comprehensive portfolio of semiconductor packaging related technologies available as part of Siemens Xcelerator,” said AJ Incorvaia, our SVP of Electronic Board Systems. “By combining these with Innovator3D IC we enable customers to achieve the realization of more-than-Moore.” Get the scoop here in our newsroom: ⤵️ https://sie.ag/73Tgfu #IntegratedCircuitDesign #Semiconductors