Alan Weckel’s Post

Keysight Demonstrates First Full Line Rate 1.6 Terabit Ethernet Test Capability Industry’s first IEEE P802.3dj draft compliant 1.6 terabit media access control engine developed by Keysight that can generate, receive, and measure 1.6 terabits (1600GE) of full line rate Ethernet layer 2 traffic Provides proof to the industry that a test and measurement hardware development platform can test early 1.6 terabit bandwidth-capable networking devices and interconnects. Real-world demonstration showcases Keysight’s innovation in achieving another industry first for ultra high-speed Ethernet traffic generation and measurement analysis

⤴️ Scale Up Data Centers for #ai/ML with 1.6Terabit ⤴️ 1.6T Ethernet is the next generation of Ethernet that addresses the demand for more network bandwidth and data throughput, driven in part, by ever-increasing AI workloads within the network infrastructure. Today Keysight Technologies and Credo demonstrated the industry's first full line rate 1.6 Terabit #Ethernet testing capability. In recognizing the challenges of deploying 1.6T Ethernet, Keysight, developed the industry's first working 1.6T Layer 2 traffic generation and measurement system, and is demonstrating it in a joint testbed with Credo. As #1.6T adoption gains momentum, establishing a testing framework early in the product development life cycle is critical to help speed time to market and enable confident deployment Read the press release: https://lnkd.in/gtdp9xwF

👀 👇 Next-generation Ericsson RAN Compute breaks ground in network processing power - The enhanced RAN Compute portfolio includes new products and capabilities that help communications service providers maximize increasingly diverse spectrum assets - Powered by Ericsson Silicon, the processors can support four times more capacity, six 4G and 5G mode configurations, two times more energy efficient and enhanced AI capabilities - Innovative 5G RAN software and two high-capacity routers to support this RAN Compute evolution, boosting automation and network capacity A keystone to the cutting-edge network processing power and benefits is based on Ericsson Silicon, - a system-on-a-chip, which is at the heart of the Ericsson Radio System. It is built on a custom-made, flexible and modular architecture, which is what enables the existing RAN Compute portfolio to consume 30 to 60 percent #less #power compared to industry benchmarks. Ericsson is working with Intel Corporation as key partner for this new generation of #RAN Compute products, utilizing Intel 4 technology, as the two companies continue to build on their strategic collaboration. The pressure on #mobile #networks is rapidly increasing with the growth of #5g Emerging 5G Advanced applications such as extended reality (#xr) use cases will also add to the already booming traffic growth, increasing the demands on the network both in the downlink and uplink. Efficient #spectrum use and intelligence are key to boosting network capacity, reducing cost of ownership and automating manual tasks. On the RAN software front, Ericsson will also debut two new features - Automated Carrier Aggregation and Carrier Aggregation Data Steering - to optimize spectrum utilization and drastically reduce operational costs. #3gpp #gsma 5GAmericas Free 5G Training EU Digital & Tech

2023 celebrated the 50th #anniversary of #ethernet, and as we’ve crossed this milestone, we’re looking to the future with new trends and innovations! Michael Klempa, Product Marketing Specialist at Alphawave Semi, recently co-wrote an article in The Fast Mode talking about the future of #ethernet with Chris Lyons Amphenol CS. As we embark on the next 50 years of #ethernet, here’s what Michael and Chris think we’ll see: + We’ll shift to UCIe-enabled I/O chiplets for copper and optical interconnect + We’ll see the emergence of tailored low-latency ethernet solutions + 200GbE will gain momentum as standardization progresses + The industry will move beyond 200GB/lane links within the data center Read more about the future of ethernet here! https://lnkd.in/gJ55qZRF #AlphawaveSemi #ethernet #UCIe #chiplets #LowLatency #AcceleratingTheConnectedWorld

800G Ethernet, driven by the demand for AI large models, offers multiplied computing efficiency and enables greater scalability in network deployments. #Ethernet #ETC #IEEE802.3bs https://lnkd.in/gWabzFB7

Exploring the hot topic of 400G network solutions, including various connection methods and considerations for different optical transceivers. #400gsr8 #400gdr4 #400gfr4 https://lnkd.in/gkMDBKxq

Exciting news! H3C, in collaboration with Spirent Communications, has successfully completed the industry's first-ever large-scale 800G test! This test demonstrates that H3C’s S9827, an 800G CPO silicon photonic switch series, boasts excellent reliability and stability in key performance indicators such as overall switch capacity, full-port 100%-line speed forwarding, and transmission latency. This provides a powerful network core for unleashing massive computing power and enhancing the application experience of computing power. The test leverages the Spirent TestCenter 800G B2 Appliance, the industry’s first 800G testing platform, offering a robust L1-L2 feature set combined with broad L3 protocol support over multi-rate 800G/400G/200G/100G/50G. The H3C S9827 series, a new generation of 800G data center switches based on CPO silicon photonics technology, has a total switching capacity of up to 51.2T, and all 64 ports achieve 100%-line speed forwarding under different traffic, with each port transmission rate reaching 800Gbps. 💪 🎉🤝Congratulations to both H3C and Spirent on this significant milestone. We’re excited to see how this breakthrough will drive the evolution of high-speed Ethernet and refresh more records. Learn more: https://lnkd.in/gY-dShUH #TechNews #H3C #Spirent #800GTest #AI #DigitalInfrastructure #Ethernet #H3Credible #H3Creative #DedicationForASmarterFuture #switch #H3CS9827series #Ethernetswitch #800Gswitch #CPO #H3CProduct

How Many IP Cameras can an Ethernet Switch Connect to? Part III. How to choose an Ethernet switch? 1. Case There is a campus network and more than 500 high-definition cameras with a bitstream of 3M to 4M. The network structure is divided into the access, aggregation, and core layers. It is stored in the aggregation layer and each aggregation layer corresponds to 170 cameras. Problems: How to choose products? What's the difference between 100M and 1000M? What factors will affect the transmission of images in the network, and what factors are related to switches? That 2 times of the sum of all port capacities*the number of ports should be less than the nominal backplane bandwidth can achieve full-duplex non-blocking wire-speed switching and prove that the switch has the conditions to maximize data switching performance. For example, for a switch that can provide up to 48 Gigabit ports, its full configuration capacity should reach 48 × 1G × 2 = 96Gbps, which can ensure that it can provide non-blocking wire-speed packet switching when all ports are in full duplex. 2. Packet Forwarding Rate Full configuration packet forwarding rate (Mbps) = the number of fully configured GE ports* 1.488Mpps + the number of fully configured 100M ports*0.1488Mpps The theoretical throughput of one Gigabit port is 1.488Mpps when the packet length is 64 bytes. For example: If a switch can provide up to 24 Gigabit ports and the claimed packet forwarding rate is less than 35.71 Mpps (24 x 1.488Mpps = 35.71), then it is reasonable to assume that the switch is designed with a blocking architecture. Generally, a switch with sufficient backplane bandwidth and packet forwarding rate is suitable. Switches with relatively large backplanes and relatively low throughput should have problems with software efficiency/dedicated chip circuit design in addition to retaining the ability to upgrade and expand; switches with relatively small backplanes and relatively large throughput have relatively high overall performance. The camera bitstream, usually the bitstream setting of the video transmission (including the encoding and decoding capabilities of the encoding sending and receiving equipment, etc.), affects the clarity, which is the performance of the front-end camera and has nothing to do with the network. It's a misunderstanding that users think that the low clarity is caused by the network. According to the above case, we can calculate: Bitstream: 4Mbps Access: 24*4=96Mbps<1000Mbps<4435.2Mbps Aggregation: 170*4=680Mbps<1000Mbps<4435.2Mbps

Next-generation networks will need more bandwidth for Ethernet switching than ever before to support emerging, demanding workloads like artificial intelligence (AI) training and inference. It’s a challenge Keysight Technologies is looking to help solve with new testing capabilities to help validate the switching hardware required for next-generation networking. The new testing benchmark was done as a collaboration between Keysight and silicon vendor Marvell. Using Keysight’s AresONE-M 800GE test equipment and Marvell’s Teralynx 10 Ethernet programmable Switch, the partners processed 51.2 Terabits per second (Tbps) of traffic across 64 links of 800 Gigabit Ethernet while measuring key performance metrics. According to Keysight, the benchmark establishes a new standard for silicon validation of Ethernet switching performance. It will enable network equipment manufacturers, chipset vendors and data center operators to ensure their solutions can handle the massive data flows required by advanced AI workloads. While the initial benchmark was conducted with silicon from Marvell, the testing infrastructure approach is not limited to just that one vendor.

The landscape of #HFT has undergone remarkable transformations over the past two decades, driven by relentless innovations in networking technology and strategic geographical and architectural optimizations. Let's delve in all the phases: 1) Strategies for reducing latency in early 2000s electronic #trading: -Use of store and forward networking by market data providers, exchanges, and electronic trading customers -Seeking the lowest latency execution to flip strategies from loss to profit -Relocating closer to exchanges to reduce data travel distance and link latency -Eliminating unnecessary network hops to streamline data flow -Consolidating feed handler and trading execution servers on the same switch to minimize internal network transit time -Implementing high-performance 10Gb NICs with embedded FPGAs to enhance processing speed B) 2008 and the seismic shift in networking technology: -Introduction of the first generation of high-performance 10G switches with cut-through architectures -Shift from microsecond-level switch latency (10-30 microseconds being fast) to latency as low as hundreds of nanoseconds -Migration towards cut-through networking to minimize latency -Use of dedicated switches with integrated traffic filtering and latency monitoring to eliminate queuing or congestion delays -Release of high-density systems between 2008 and 2012, with incremental latency improvements C ) Advancements in network devices and strategies after 2013: -Emergence of Layer-1 switches leveraging cross-points for ultra-low latency (4-6ns) but limited in networking functions -Use of in-network #FPGAs for essential packet processing, focusing on multiplexing to maintain low latency -Continued efforts to reduce latency, known as the "race to zero" D) From 2023 ahead the industry continue advancing: -Metamako, a key company in this space, acquired by Arista Networks -Release of the Arista 7130 Series, incorporating crosspoint L1 and FPGA-based systems -25G L1 + switching and high density 25/100G L1 replication -Ongoing investment in technology, transitioning from MOS to EOS operating models -Introduction of higher density systems and an integrated L2/L3 switch application for the embedded FPGA -Consolidation of networking functions into the L1+ infrastructure to enhance efficiency and speed