We are seeking a highly skilled and experienced Physical Design Engineer to join our dynamic team in Sunnyvale, CA. The ideal candidate will possess extensive experience in block-level implementation activities and be proficient in advanced technology nodes. This is a hybrid position requiring in-office presence a minimum of three days per week.
Responsibilities
Lead and manage block-level implementation activities from Netlist to GDS II and Signoff.
Perform detailed physical design tasks, including floor planning, placement, routing, and optimization.
Utilize advanced PnR tools (such as Cadence Innovus) for efficient and effective physical design implementation.
Conduct timing analysis and closure using PrimeTime, Tempus, or equivalent tools.
Collaborate closely with cross-functional teams, including logic design, verification, and DFT teams, to ensure design quality and efficiency.
Troubleshoot and resolve complex physical design issues, ensuring compliance with design and performance specifications.
Continuously improve design methodologies and contribute to the development of best practices.
Required Qualifications & Experience
Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field. A Master’s degree or Ph.D. is preferred.
Minimum of 10 years of hands-on experience in block-level physical design implementation activities (Netlist to GDS II and Signoff).
Proven expertise in working with 7nm, 5nm, and below technology nodes.
Extensive experience with Cadence PnR tools, including Innovus, PrimeTime, Tempus, and related EDA tools.
Strong understanding of semiconductor manufacturing processes and design rules.
Excellent problem-solving skills and the ability to troubleshoot complex design issues.
Strong communication and teamwork skills, with the ability to collaborate effectively with cross-functional teams.
Proven ability to work in a fast-paced and dynamic environment.
Preferred Skills
Experience with advanced node challenges, including multi-patterning, EMIR, and reliability.
Knowledge of scripting languages such as Python, Perl, or Tcl for automation purposes.
Familiarity with other EDA tools and methodologies.
Work Environment
This position is based in Sunnyvale, CA, and requires a minimum of three days per week in the office.
The role involves working in a highly collaborative and fast-paced setting, with opportunities for continuous learning and professional growth.
Seniority level
Mid-Senior level
Employment type
Contract
Job function
Engineering and Information Technology
Industries
Computers and Electronics Manufacturing
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