Tom Goodman

Power devices are experiencing strong growth driven by demand in a variety of areas. Applications include energy generation and infrastructure, electric and hybrid vehicles, electric vehicle charging, data centers, industrial automation, smart cities and buildings, home appliances, and transportation. While many companies continue to expand production of silicon-based power devices, there is also demand for devices based on new wide band gap (WBG) materials such as silicon carbide (SiC) and… Show more

Power devices are experiencing strong growth driven by demand in a variety of areas. Applications include energy generation and infrastructure, electric and hybrid vehicles, electric vehicle charging, data centers, industrial automation, smart cities and buildings, home appliances, and transportation. While many companies continue to expand production of silicon-based power devices, there is also demand for devices based on new wide band gap (WBG) materials such as silicon carbide (SiC) and gallium nitride (GaN). Driven by the need for increased power density and system efficiency, these WBG materials are being adopted in many applications. The ramp of WBG devices will push operating temperatures to 200 ̊C and beyond, and require new materials and assembly processes. Market projections for leadframe (including Cu clip) and embedded die packages are provided. Critical needs for packaging and assembly are identified. New developments in die attach materials are described, with a focus on Pb-free options. Show less

The automotive industry is undergoing a period of dramatic change in both its technology and its players. More than 80 companies are developing autonomous vehicles and many more are involved in providing sensors and computational systems for decision making for advanced driver assistance systems (ADAS). System design, package choices, materials, and process integration are critical to the successful implementation of the new safety features that are part of ADAS. This report also examines the… Show more

The automotive industry is undergoing a period of dramatic change in both its technology and its players. More than 80 companies are developing autonomous vehicles and many more are involved in providing sensors and computational systems for decision making for advanced driver assistance systems (ADAS). System design, package choices, materials, and process integration are critical to the successful implementation of the new safety features that are part of ADAS. This report also examines the impact of the adoption of electric vehicles on packages used for the powertrain. Show less

Despite the grim outlook in the semiconductor market in recent years, demands for advanced packaging technology continue to increase. System designers are searching for innovative methods in addition to flip chip and wafer level packaging to increase the performance and decrease the size of a device. Additional wafer processing in back-end assembly has been practiced on a limited scale for years to enhance device functionality. The application and complexity of this ‘post-passivation… Show more

Despite the grim outlook in the semiconductor market in recent years, demands for advanced packaging technology continue to increase. System designers are searching for innovative methods in addition to flip chip and wafer level packaging to increase the performance and decrease the size of a device. Additional wafer processing in back-end assembly has been practiced on a limited scale for years to enhance device functionality. The application and complexity of this ‘post-passivation layer’wafer processing in the back end will increase as innovative technical solutions are required to enable future high-performance devices. Current and future opportunities for enhancing device functionality in wafer form include fabrication of I/O redistribution structures, on-chip integrated passives, thick copper traces for power management, and stress buffer layers. Show less

With 300mm wafer processing, expect to see a shift from conventional proximity aligners to more applications of 1x steppers for backend bump processing. While passe for leading-edge frontend applications, 1x steppers provide clear advantages for semiconductor manufacturing's backend, in cost of ownership, automation, and processing. Advantages include broadband exposure, superior automatic alignment, and overlay performance. The 2 [micro] m resolution capability of these tools is more than… Show more

With 300mm wafer processing, expect to see a shift from conventional proximity aligners to more applications of 1x steppers for backend bump processing. While passe for leading-edge frontend applications, 1x steppers provide clear advantages for semiconductor manufacturing's backend, in cost of ownership, automation, and processing. Advantages include broadband exposure, superior automatic alignment, and overlay performance. The 2 [micro] m resolution capability of these tools is more than adequate for even difficult bump applications. In addition, these tools' low 0.16 NA provides a large depth of focus (5.0 [micro] m at the resolution limit of 2.0 [micro] m), which is useful in imaging thick resist. Show less

The main drivers for packaging in highly functional, miniaturized portable products are small form factor and cost. Established technologies such as quad flat packs (QFP) and small outline packages (SOP) have been available to designers for years. Recently, a multitude of packaging solutions have been developed to meet the needs of future portable products. Many companies are tuning to small, high density mounting in the form of ball grid arrays (BGA), chip-size packages (CSP), and flip chip… Show more

The main drivers for packaging in highly functional, miniaturized portable products are small form factor and cost. Established technologies such as quad flat packs (QFP) and small outline packages (SOP) have been available to designers for years. Recently, a multitude of packaging solutions have been developed to meet the needs of future portable products. Many companies are tuning to small, high density mounting in the form of ball grid arrays (BGA), chip-size packages (CSP), and flip chip. The choice of technology is based on a portable product's requirements for performance (including size) and cost (including manufacturability). Examination of a number of current products shows an array of different technology mixes. Despite the proliferation of new high density mounting worldwide, many companies are satisfying current needs with peripherally leaded QFPs and SOPs. Show less

Until recently, fine-pitch leaded packages such as QFPs and TSOPs were the only packages available for high-density mounting in portable products. Ball grid arrays surfaced several years ago as an alternative to peripherally leaded packages. Within the past year, however, a new choice, chip-scale packages (CSPs), has emerged for applications requiring high-density packaging. The chip-scale package-sometimes called a chip-size package-is a small form factor package that is about the same size as… Show more

Until recently, fine-pitch leaded packages such as QFPs and TSOPs were the only packages available for high-density mounting in portable products. Ball grid arrays surfaced several years ago as an alternative to peripherally leaded packages. Within the past year, however, a new choice, chip-scale packages (CSPs), has emerged for applications requiring high-density packaging. The chip-scale package-sometimes called a chip-size package-is a small form factor package that is about the same size as the IC.
As many as 40 different CSPs are in various stages of development at some 30 organizations worldwide. Although no single CSP stands out as representative of these new packages, they can be divided into four categories-flex interposer, rigid substrate, lead frame, and wafer level (see table). Packages have either solder bumps, pads, or leads for interconnection to the printed circuit board (PCB). Show less

The importance of high density mounting in the design of highly functional and/or portable products will grow considerably in the future. The use of flip chip on mother boards and inside a package will become critical to achieving these densities. For direct attach to laminate boards, infrastructure development is required to move flip chip into fullscale volume production. First, a number of semiconductor companies offering a sufficient supply of bumped chips is needed before companies without… Show more

The importance of high density mounting in the design of highly functional and/or portable products will grow considerably in the future. The use of flip chip on mother boards and inside a package will become critical to achieving these densities. For direct attach to laminate boards, infrastructure development is required to move flip chip into fullscale volume production. First, a number of semiconductor companies offering a sufficient supply of bumped chips is needed before companies without wafer fabs are able to adopt the technology in volume. Secondly, the development of low-cost bumping processes is also required, as are improved underfill materials, test sockets, low-cost high density boards, and equipment to mount flip chip devices. The use of chip size packages (CSP) may be favored over the use of flip chip since the former takes advantage of the existing infrastructure for surface mount technology. Show less

The Ball Grid Array (BGA) package has been developed to provide a high density, leadless surface mount alternative to existing packages. The development of BGA packages represents a departure from the established road map for packaging. BGAs are under consideration for a number of semiconductor products and will be supplied by several companies in the future. This paper discusses users and suppliers of the package, as well as business issues effecting the widespread use of the package. Today's… Show more

The Ball Grid Array (BGA) package has been developed to provide a high density, leadless surface mount alternative to existing packages. The development of BGA packages represents a departure from the established road map for packaging. BGAs are under consideration for a number of semiconductor products and will be supplied by several companies in the future. This paper discusses users and suppliers of the package, as well as business issues effecting the widespread use of the package. Today's BGA packages are used mainly in environments not subject to extreme temperatures and conditions. This paper examines reliability issues of BGA packages for areas including long life telecommunications markets and automotive applications. Market trends for tape, ceramic, and plastic BGA packages are provided. Show less

A Land Grid Array (LGA) package was designed and fabricated to utilize specific materials and design concepts for high speed operation. The performance of this LGA was compared with that of a functionally and dimensionally equivalent Pin Grid Array (PGA) that is currently being used to package high speed silicon ECL gate arrays. Two structures that were sources of signal degradation in the PGA, the pins and a layer of plating lines, were eliminated in the design of the LGA. The package was… Show more

A Land Grid Array (LGA) package was designed and fabricated to utilize specific materials and design concepts for high speed operation. The performance of this LGA was compared with that of a functionally and dimensionally equivalent Pin Grid Array (PGA) that is currently being used to package high speed silicon ECL gate arrays. Two structures that were sources of signal degradation in the PGA, the pins and a layer of plating lines, were eliminated in the design of the LGA. The package was fabricated out of Du Pont Green Tape low temperature co-fired ceramic (LTCC) with gold conductors and vias. This combination of an improved LGA, structure and materials with superior high speed properties resulted in a package with improved performance and decreased signal degradation when compared with conventional high temperature co-fired ceramic (HTCC) PGAs. Show less

A 181 pin Pin Grid Array (PGA) was characterized using time and frequency domain techniques to identify major sources of signal degradation. The pins, as well as a layer of plating lines that was included for electroplating the exterior metal surfaces, were found to have a deleterious effect on the signal transmission within the package. In addition, a ground delay resulting from the separation of the signal pin and its nearest ground pin was seen to cause significant degradation in signal… Show more

A 181 pin Pin Grid Array (PGA) was characterized using time and frequency domain techniques to identify major sources of signal degradation. The pins, as well as a layer of plating lines that was included for electroplating the exterior metal surfaces, were found to have a deleterious effect on the signal transmission within the package. In addition, a ground delay resulting from the separation of the signal pin and its nearest ground pin was seen to cause significant degradation in signal lines whose pin was far from a ground I/O. For signal lines that are geometrically equivalent due to package symmetry, this effect was seen to increase with increasing signal/nearest ground pin distance, resulting in as much as a 79% increase in the package risetime in some lines. Show less