Mary Lou Jepsen

Wonderful to see Dr. Luvisi featured by Healio | Ocular Surgery News for our work creating a neural network capable of predicting the response of DME to anti-VEGF agents! A portion of DME patients still don't respond to anti-VEGF and likely go on to steroid treatment, this algorithm helps identify those patients in advance. Done in conjunction with the team at Voxeleron, this was a true collaboration between computer science and clinicians that took several years to build. Hopefully, these types of models will help us choose therapy and counsel patients in the future! #ai #machinelearning #diabetes #diabeticmacularedema

36

Stitching vias, also known as via stitching, are a crucial design practice for PCBs. By placing a series of vias around the perimeter of a ground plane or signal trace, a continuous conductive path is created, connecting the top and bottom layers of the board. #PCBdesign #viastitching

1

Last week’s DAC showcased exciting announcements from startups that are revolutionizing semiconductor design however these rising stars overshadowed a major update from an industry stalwart - Alphawave Semi - whose news is poised to accelerate the proliferation of chiplets and give rise to a “chiplet marketplace”. Alphawave Semi announced a breakthrough with the tapeout of the industry's first off-the-shelf, multi-protocol I/O connectivity chiplet. This technology can seamlessly integrate into larger SoCs or multi-chip modules, giving designers increased flexibility and more connectivity options for different applications. Reflecting on the Chiplet Summit this past spring, I remember listening to Tony Chan Carusone, Alphawave’s CTO, as he passionately described the significance of chiplets and how Alphawave will foster a more open and democratic design ecosystem. Now, just one quarter later, his team has launched a technology that brings this vision much closer to becoming a reality. Adding to their momentum, Alphawave also announced an expanded partnership with Samsung Foundry to advance the industry's progression toward cutting-edge semiconductor nodes, crucial for the evolution of advanced compute. Samsung’s roadmap in sub-4nm technologies includes FinFET and Gate-All-Around, which are designed to maximize performance in the post-Moore era. Initially targeted for data centers and HPC, these innovations may trickle down to low-cost, AI-enabled edge devices, putting the transformative power of AI into the hands of billions of people worldwide. This news follows Alphawave’s early June announcement of their new partnership with Arm, aimed at unlocking the potential of processors. Alphawave will give Arm access to their robust portfolio of connectivity solutions and silicon IP, which Arm will integrate into their proven portfolio of compute cores. At a time when AI technology is accelerating at breakneck speed, many companies are searching for ways to boost compute performance and address the challenge of moving data between compute and memory more efficiently. While multiple startups offer unique solutions, many customers want battle-tested technology to avoid the risk of investing in solutions that may become obsolete by the time they reach tapeout. Alphawave has developed vital solutions and in doing so, has increased design flexibility, built bridges to new process technologies, and shortened the path to market. “Connectors” are often the catalysts of innovation and Alphwave’s is a testament to that word. I’m encouraged by what I’ve seen from Alphawave and strongly believe they stand at the forefront of an emerging chiplet marketplace. More broadly, I believe their technology serves to democratize design technology and will give emerging companies more options to bring their brilliant ideas to life. #semiconductorindustry #ai #chiplets

110

Are you into tech in your Car? For convenience, performance, or safety? Cadence and Arm announced a collaboration to jumpstart the automotive chiplet ecosystem and accelerate software-defined vehicle design. We are focusing on ADAS capabilities and fostering industry-wide collaboration for heterogeneous integration and #automotive system innovation. Read more about it in the blog here: https://ow.ly/8COS50ROVG5 #AutomotiveInnovation #Chiplets

4

When adding stitching vias to a PCB, strategic placement is crucial. It's essential to position them around the edges of critical components, high-speed signal traces, and ground planes. This ensures effective shielding and enhanced signal integrity. The appropriate size and spacing of stitching vias are chosen based on your application's specific requirements and the PCB's material. #PCBdesign

5

When Late To A Party ..... Maybe Start Your Own Party! When faced with arriving late to an established market, one of the most effective strategies is to pause and innovate rather than simply join the competition. NVIDIA's remarkable success exemplifies this approach. Instead of directly challenging established giants like Intel and other chip manufacturers, NVIDIA chose to pioneer a new frontier in AI technology. Under the leadership of Mr. Huang and his team, NVIDIA avoided the conventional path of market competition and opted to anticipate future needs by developing a new class of chips that outpaced existing technologies. This strategic foresight has proven to be a pivotal decision, underscoring the long-term viability and innovative spirit that defines NVIDIA's trajectory in the industry. #Innovation #BusinessStrategy #TechnologyLeadership #NVIDIA

8

UHDI and substrates: Forming clean microvias for subsequent metalization in build up circuitry to connect to a trace below is a challenge. Some recommend high frequency pulsed lasers to eliminate/minimize debris in the holes. Would a photo imageable build up film solve this challenge?

10

13 Comments

Join this upcoming AMD w ebinar on June 26th: Designing for Versal Adaptive SoCs with AI Engines using Simulink and Vitis Model Composer. This webinar will show an example design – targeting the programmable logic and AI Engines in a Versal AI Edge device, and features speakers from AMD, Avnet, and MathWorks. #TogetherWeAdvance #AdaptiveComputing #Webinar #Versal #Vitis

13

In my new role at Sondrel, I wanted to offer my thoughts and views that we are seeing in the current semiconductor industry. I hope you find this article informative.

19

3 Comments

AI is driving the next wave of growth for the semiconductor industry (and those of us in the industry can't wait to see the anticipated growth 😉). Recently, I was encouraged to watch a keynote featuring Jensen Huang of NVIDIA. While it's highly informative and I recommend watching it in its entirety, what struck me most had nothing to do with AI. Around 36:05, the facilitator asked Jensen to provide advice on how to achieve success. His response is profound, drawing parallels between expectations, resilience, success, intelligence, and character. His commentary on how he leads his 55 direct reports (yes, 55!) is also thought-provoking. Take a few minutes to watch this keynote and listen to Jensen's insights on success and leadership. #artificialintelligence #NVIDIA #leadership

20

2 Comments

Cadence introduces the Janus NoC for SoC designs.

28

Check out our perspective on AI’s monumental shift from the cloud to on-device processing and the advantages it brings, from improved privacy to reduced latency to cost savings. https://bit.ly/4e8zH50 #chip #neuromorphic #analogdesign #neuromorphicanalog #AI #tinyml #tinyai #neuralnetworks #ml #edgeAI #ultralowpower #neuromorphiccomputing #neuromorphicsensing

7

Interesting video about the pros and cons of two different gage study methods.

10

GDDR7 is the next big thing in graphics memory, promising significant improvements over its predecessor GDDR6. Micron, a major manufacturer, claims that GDDR7 will offer a 30% performance boost in gaming, for both ray tracing and traditional rasterization. This is backed by a 60% increase in bandwidth and 50% improvement in power efficiency compared to GDDR6. Micron's claims are based on their new 32Gb/s GDDR7 modules, significantly faster than the current fastest GDDR6X modules. However, it's important to be cautious. While GDDR7 itself is impressive, graphics card manufacturers like Nvidia might use narrower memory interfaces, reducing the overall performance gain. Nvidia is rumored to be the first to adopt GDDR7, while AMD might stick with GDDR6 for their next generation and Intel's plans are unclear. Overall, GDDR7 represents a major leap in graphics memory technology, with substantial performance improvements and efficiency gains. However, the actual impact in real-world applications might be slightly lower due to potential limitations from graphics card designs. #gddr7 #chips #memorychips #gpus #hardware #computerhardware #micron #chipmaker

1

#SilencerDevices Noise Cancelling Technology Patent Portfolio is Growing! Total is now 4 US and 18 International patents - on track for our goal of patent protection covering 80% of the global GDP for our radically better technology (with 20x the frequency range and 50% better efficacy than the legacy ANC). #technology #ANC #NoiseCancelling

195

59 Comments

Great! If u liked it , u can subscribe to my newsletter Insight_vault https://lnkd.in/d4eNRyjB for weekly updates on AI , TECH. #AI #NVIDIAAI #artificialintelligence

3

Bump Pitch Transformers Will Revolutionize Advanced Packaging There’s better, cost-effective path to 2.5D packaging landscape SAN FRANCISCO, June 27, 2024 /PRNewswire/ -- Dr. Larry Zu, Founder and CEO of Sarcina Technology, the Application Specific Advanced Packaging (ASAP) Design Service and Production leader, predicted that recent Bump Pitch Transformer (BPT) designs will speed 2.5D IC advanced packaging adoption to meet the red-hot demand for AI innovation. In remarks made in the Keysight Theater at the 61st Design Automation Conference, he envisioned new BPT technology paving the way for new artificial intelligence computing opportunities. "We believe that the Bump Pitch Transformer architecture will accelerate the growth rate of 2.5D semiconductor packages that are key to meeting the explosive demand for AI-driven computing capabilities," Dr. Zu said during his address in the Keysight Theater. Fan-Out Chip-on-Substrate with Silicon Bridge (FoCoS-B) is the latest BPT advancement, he said, and it democratize the 2.5D era. This packaging technology is now available through companies such as ASE and SPIL, breaking a logjam of innovation created by previous proprietary BPT technologies. FoCoS-B is a silicon bridge technology, replaces expensive silicon TSV interposers with more cost-effective re-distribution layers (RDL). This architecture is ideal for homogenous and heterogenous chiplet integration targeting high-performance computing (HPC) devices for AI, data center, microprocessor, and networking applications. Current advanced 2.5D packaging uses a substrate to transpose an IC's microbump pitch from 40-50 um to the package's 130 um bump pitch. These substrates are very expensive, in short supply, and are complex to design resulting in lead-time and cost challenges. The new FoCoS-B technology is effectively a Wafer Fan-out RDL technology which, due to its maturity, has inherently a lower cost and shorter lead time thus enabling system designers to optimize AI for new lower cost applications. Sarcina is currently engaging companies with two Bump Pitch Transformer derivatives across a range of applications. Its services include BPT interposer design, O/S test pattern insertion, fabrication & BPT wafer sort, along with package substrate design, PI/SI + thermal system simulation, & substrate fabrication. A complete WIPO (wafer in, package out) engagement also covers package assembly, final test, and production services. The company has had a number of 2.5D customer devices to successfully enter production going back several years, including a large 47.5 mm x 47.5 mm, 2,019 ball high performance flip chip ball grid array device. (for further reading, please go to )

14

1 Comment

#Intel’s Gary Patton Shows the Way to a Systems #Foundry #61DAC #61DAC was buzzing this year with talk of #AI and multi-die, heterogeneous design. The promise of making 2.5/3D design and a #chiplet ecosystem mainstream reality was the focus of a lot of the panels and presentations at the conference. AI is certainly a driver for this new design style, but the conversation was broader than just AI, as you will see. This new design style will require effort from every part of the #semiconductor ecosystem, and this focus was on display during DAC. There is a focal point where all this work needs to come together to make it commercially available. That focal point is the foundry, and there was a keynote address on Tuesday morning at DAC that did a great job explaining how to open the door to the future. A very big thank you to Mike Gianfagna and SemiWiki.com for the full article  that explores how Intel’s Gary Patton shows the way to a systems foundry via the link below 🙏💡👇 https://lnkd.in/eVgX8wE8 #semiconductorindustry #semiconductors #semiconductor #technology #it #tech #innovation #semiconductormanufacturing #chip #chips #ic

61

1 Comment