Ashutosh Dhodapkar

San Francisco Bay Area Contact Info
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I love building teams and products that solve hard problems in large markets. I have a…

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Publications

  • Tuning adaptive microarchitectures

    International Journal of Embedded Systems

  • AC/DC: An Adaptive Data Cache Prefetcher

    13th International Conference on Parallel Architectures and Compilation Techniques

  • Tuning Reconfigurable Microarchitectures for Power Efficiency

    18th International Parallel and Distributed Processing Symposium

  • Comparing Program Phase Detection Techniques

    36th Annual International Symposium on Microarchitecture

  • Integrated Performance, Power, and Thermal Modeling

    Journal of Circuits, Systems, and Computers, Volume 11

  • Managing Multi-Configuration Hardware via Dynamic Working Set Analysis

    29th International Symposium on Computer Architecture

  • Saving and Restoring Implementation Contexts with co-Designed Virtual Machines

    Workshop on Complexity-Effective Design

  • TEM2P2EST: A Thermal Enabled Multi-model Power/Performance ESTimator

    Power-Aware Computer Systems

Patents

  • Checkpoint Efficiency Using a Confidence Indicator

    US 20080148026

    Other inventors
    • Michael G. Butler
  • Efficient Load Queue Snooping

    US 20090319727

    Other inventors
    • Michael G. Butler
  • Identifying Program Phase Changes Through Program Working Set Analysis

    US 7,502,914

    Other inventors
    • James E. Smith
  • Mechanism for Predicting and Suppressing Instruction Replay in a Processor

    US 7,890,933

    Other inventors
    • Michael G. Butler
    • Gene W. Shen
  • Systems and methods for creating dynamic programmable magnetic stripes

    US 10127488

  • Transitive Suppression of Instruction Replay

    US 7,502,914

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